研究成果

  • 深度学习算法的硬件设计与优化
    （1）深度神经网络的定点化：深度神经网络中大量的冗余信息占用了较多的计算量和数据带宽，可以根据硬件的计算能力需求，对已训练好的浮点网络中的权重和中间数据进行量化，在引入较小误差的前提下提升神经网络推断的处理速度和能量效率，提升系统的处理速度和能量效率。
    （2）基于存储计算结构的深度神经网络异构计算平台：基于非易失存储的新兴存储计算结构能够大幅降低矩阵运算的能量和时间代价，具有提升深度神经网络能效和速度的潜力。夏立雪从多个层次入手，在算法映射上，提出了将卷积神经网络其映射到基于矩阵运算的存储计算结构上的方法；在微体系结构方面，提出了基于矩阵运算单元的卷积层间的流水线处理结构；在实际芯片设计过程中，利用神经网络的稀疏性，通过模型压缩来容忍硬件错误。

  • 已发表/录用30余篇学术论文，包括7篇期刊（均为SCI索引）和27篇会议论文（均为EI索引）。学术成果大部分都发表在领域内重要会议和期刊中，包括EDA领域内四大会议中的DAC 6篇（EDA领域顶级会议，CCF-A类会议），DATE 5篇（在谷歌学术Computer Hardware Design领域会议排名第 3），ICCAD1篇（排名第7），ASPDAC 5篇（排名第 9），芯片领域顶会HotChips 1篇（阿里第一篇），VLSI Symp. 1篇，顶级期刊IEEE TCAD 5篇（影响因子1.942），IEEE JETCAS 1篇（影响因子2.542）。夏立雪获得过2次最佳论文提名，分别为DAC 2017和ITC 2018。夏立雪的谷歌学术引用800余次，H指数为14，H10指数为18。学术成果获得2项专利授权并已完成商业授权出售，1项专利已公开。


已发表/录用论文

    期刊论文

  • [J7] Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang, Long Live TIME: Improving Lifetime and Security for NVM-based Training-In-Memory Systems , to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020.
  • [J6] Yi Cai, Tianqi Tang, Lixue Xia, Boxun Li, Yu Wang, Huazhong Yang, Low Bit-width Convolutional Neural Network on RRAM , in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.
  • [J5] Ming Cheng, Lixue Xia, Zhenhua Zhu, Yi Cai, Yuan Xie, Yu Wang, Huazhong Yang, TIME: A Training-in-memory Architecture for RRAM-based Deep Neural Networks, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.38, No.5, 2019.
  • [J4] Lixue Xia, Mengyun Liu, Xuefei Ning, Krishnendu Chakrabarty, Yu Wang, Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing System, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.38, No.9, 2019.
  • [J3] Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Pai-yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang, MNSIM: Simulation Platform for Memristor-based Neuromorphic Computing System, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.37, No.5, 2018, pp.1009-1022.
  • [J2] Lixue Xia, Wenqin Huangfu, Tianqi Tang, Xiling Yin, Krishnendu Chakrabarty, Yuan Xie, Yu Wang, Huazhong Yang, Stuck-at Fault Tolerance in RRAM Computing Systems , in IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol.8, No.1, 2018, pp.102-115.
  • [J1] Lixue Xia, Peng Gu, Boxun Li, Tianqi Tang, Xiling Yin, Wenqin Huangfu, Shimeng Yu, Yu Cao, Yu Wang, Huazhong Yang, Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication, in Journal of Computer Science and Technology (JCST), vol.31, No.1, 2016, pp.3-19.


    • 会议论文

  • [C27] Jiansong Zhang, Lixue Xia, Zhao Jiang, Hao Liang, Jiaoyan Chen, Shouda Liu, Wei Lin, Yuan Xie, Ouroboros: An Inference Engine for Deep Learning Based TTS on Embedded Devices, in IEEE Hot Chips 31 Symposium (HCS), 2019.
  • [C26] Lixue Xia, Lansong Diao, Zhao Jiang, Hao Liang, Kai Chen, Li Ding, Shunli Dou, Zibin Su, Meng Sun, Jiansong Zhang, Wei Lin, PAI-FCNN: FPGA based inference system for complex CNN models, in IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019. (invited)
  • [C25] Zhenhua Zhu, Yujun Lin, Hanbo Sun, Guohao Dai, Lixue Xia, Yu Wang, Huazhong Yang, A Configurable Multi-Precision CNN Accelerator Based on Single Bit RRAM, in ACM/EDAC/IEEE Design Automation Conference (DAC),2019.
  • [C24] Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty, \Fault Tolerance in Neuromorphic Computing Systems", in Asia and South Pacific Design Automation Conference (ASP-DAC), 2019.
  • [C23] Yi Cai, Tianqi Tang, Lixue Xia, Ming Cheng, Zhenhua Zhu, Yu Wang, Huazhong Yang, Training Low Bitwidth Convolutional Neural Networks on RRAM, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2018, pp.117-122.
  • [C22] Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang, Long Live TIME: Improving Lifetime for Training-In-Memory Engines by Structured Gradient Sparsification , in Design Automation Conference (DAC), 2018.
  • [C21] Keni Qiu, Weiwen Chen, Yuanchao Xu, Lixue Xia, Yu Wang, Zili Shao, A Low Power Design Enabled by a Peripheral Circuit Reuse Structure integrated with a Retimed Data Flow for RRAM Crossbar-based Convolutional Neural Network, in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018.
  • [C20] Jilan Lin, Lixue Xia, Zhenhua Zhu, Hanbo Sun, Yi Cai, Hui Gao, Ming Cheng, Xiaoming Chen, Yu Wang, Huazhong Yang, Rescuing Memristor-based Computing with Non-linear Resistance Levels , in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, pp.407-412.
  • [C19] Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty, Design of Fault-Tolerant Neuromorphic Computing Systems , in European Test Symposium, 2018.
  • [C18] Zhenhua Zhu, Jilan Lin, Ming Cheng, Lixue Xia, Hanbo Sun, Xiaoming Chen, Yu Wang, Huazhong Yang, Mixed Size Crossbar based RRAM CNN Accelerator with Overlapped Mapping Method , in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018.
  • [C17] Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty, Fault Tolerance for RRAM-Based Matrix Operations , in International Test Conference (ITC), 2018. (Best Paper Candidate)
  • [C16] Yuanhui Ni, Keni Qiu, Weiwen Chen, Lixue Xia, Yu Wang, Low Power Driven and Multi-CLP aware Loop Tiling for RRAM Crossbar-based CNN , in ACM/SIGAPP Symposium On Applied Computing (SAC), 2018.
  • [C15] Wenqin Huangfu, Lixue Xia, Ming Cheng, Xilin Yin, Tianqi Tang, Boxun Li, Krishnendu Chakrabarty, Yuan Xie, Yu Wang, Huazhong Yang, Computation-Oriented Fault-Tolerance Schemes for RRAM Computing Systems , in Asia and South Pacific Design Automation Conference (ASP-DAC), 2017, pp.794-799.
  • [C14] Tianqi Tang, Lixue Xia, Boxun Li, Yu Wang, Huazhong Yang, Binary Convolutional Neural Network on RRAM, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2017, pp.782-787.
  • [C13] Lixue Xia, Mengyun Liu, Xuefei Ning, Krishnendu Chakrabarty, Yu Wang, Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems, in Design Automation Conference (DAC), 2017. (Best Paper Candidate)
  • [C12] Ming Cheng, Lixue Xia, Zhenhua Zhu, Yi Cai, Yuan Xie, Yu Wang, Huazhong Yang, TIME:A Training-in-memory Architecture for Memristor-based Deep Neural Network, in Design Automation Conference (DAC), 2017, pp.26:1-26:6.
  • [C11] Fang Su, Wei-Hao Chen, Lixue Xia, Chieh-Pu Lo, Tianqi Tang, Zhibo Wang, Kuo-Hsiang Hsu, Ming Cheng, Jun-Yi Li, Yuan Xie, Yu Wang, Meng-Fan Chang, Huazhong Yang, Yongpan Liu, A 462GOPs/J RRAM-Based Nonvolatile Intelligent Processor for Energy Harvesting IoE System Featuring Nonvolatile Logics and Processing-In-Memory, in IEEE Symposium on VLSI Circuits (VLSIC), 2017.
  • [C10] Yu Wang, Lixue Xia, Ming Cheng, Tianqi Tang, Boxun Li, Huazhong Yang, RRAM Based Learning Acceleration, in Compliers, Architectures, and Sythesis of Embedded Systems (CASES), 2016, pp.1-2. (invited)
  • [C9] Lixue Xia, Tianqi Tang, Wenqin Huangfu, Ming Cheng, Xiling Yin, Boxun Li, Yu Wang, Huazhong Yang, Switched by Input: Power Efficient Structure for RRAM-based Convolutional Neural Network, in Design Automation Conference (DAC), 2016, pp.125:1-125:6.
  • [C8] Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang, MNSIM: Simulation Platform for Memristor-based Neuromorphic Computing System, in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp.469-474.
  • [C7] Xiaoming Chen, Lixue Xia, Yu Wang, Huazhong Yang, Sparsity-Oriented Sparse Solver Design for Circuit Simulation, in DATE, 2016, pp.1580-1585.
  • [C6] Yu Wang, Lixue Xia, Tianqi Tang, Boxun Li, Song Yao, Ming Cheng, Huazhong Yang, Low Power Convolutional Neural Networks on a Chip , in ISCAS, 2016, pp.129-132.
  • [C5] Lixue Xia, Rong Luo, Bin Zhao, Yu Wang, Huazhong Yang, An Accurate and Low Cost PM2.5 Estimation Method Based on Artificial Neural Network , in Asia and South Pacific Design Automation Conference (ASP-DAC), 2015, pp.190-195.
  • [C4] Boxun Li, Lixue Xia, Peng Gu, Yu Wang, Huazhong Yang, Merging the interface: Power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal, in Design Automation Conference (DAC), 2015, pp.13:1-13:6.
  • [C3] Tianqi Tang, Lixue Xia, Boxun Li, Rong Luo, Yu Wang, Yiran Chen, Huangzhong Yang, Spiking Neural Network with RRAM : Can We Use it for Real-World Application?, in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, pp.860-865.
  • [C2] Yu Wang, Tianqi Tang, Lixue Xia, Boxun Li, Peng Gu, Hai Li, Yuan Xie, Huazhong Yang, Energy Efficient RRAM Spiking Neural Network for Real Time Classification, in Great Lakes Symposium on VLSI (GLSVLSI), 2015, pp.189-194.
  • [C1] Shimeng Yu, Pai-Yu Chen, Yu Cao, Lixue Xia, Yu Wang, Huaqiang Wu, Scaling-up Resistive Synaptic Arrays for Neuro-inspired Architecture: Challenges and Prospect, in IEEE International Electron Devices Meeting (IEDM), 2015, pp.451-454.

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